Various techniques such as e.g., multi-path software, and load balancing techniques have been introduced to speed up the communication of data between host computers and storage systems. These techniques are intended to increase input/output (I/O), and tend to achieve high success rates for write I/O operations and for random read I/O operations. However, these techniques are inefficient for sequential read I/O operations, especially when multi-path software is coupled with load balancing. This is, at least in part, because a storage controller lacks the capability to detect a sequential read pattern while burdened by the associated overhead incurred by the storage array's attempt to unveil the sequential patterns.
One performance factor in designing a storage array is the array's response time. Designers of storage arrays strive to maintain a low response time, even while I/O load patterns are changing. Almost all storage arrays incorporate algorithms to recognize a sequential read burst as they are issued to the array, hence the array will attempt to pre-fetch the data to be read into the storage array's cache.
Contemporary midrange and enterprise storage offers access to storage capacity managed by a storage controller through multiple array ports. When hosts take advantage of this feature the storage array may have difficulty identifying the sequential read pattern(s). Therefore sequential read I/O detection can be impaired, and the array often fails to recognize the patterns. This results in losing valuable pre-fetching cycles significantly increased response times, higher than normal array processor utilization, and reduced sequential I/O performance.